1. Field of the Invention
This invention relates to a semiconductor device and a process for fabricating same, and more particularly to a structure of a super-miniature semiconductor device and a process for fabricating same.
2. Description of the Prior Art
With the prior art technology to improve the high-frequency performances of a semiconductor device, attempts have been directed to reduce the junction areas in the semiconductor device for reducing a parasitic capacity and to shorten the distances between p-n junctions and electrodes for reducing a parasitic resistance. However, such attempts have reached a limit, because there should be provided a certain distance between patterns for aligning the relative positions of the patterns, in addition to a minimum spacing which is determined by the working accuracy of the respective patterns, so that both the junction area and the junction-to-electrode distance inevitably exceed the minimum values determined by the working accuracy.